real 3m22.515s user 0m48.624s sys 0m5.540s Started analysis of G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 5% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 10% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 15% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 20% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 25% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 30% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 35% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 40% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 45% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 50% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 55% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 60% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 65% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 70% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 75% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 80% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 85% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 90% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Approx 95% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R1.fastq Started analysis of G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 5% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 10% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 15% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 20% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 25% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 30% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 35% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 40% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 45% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 50% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 55% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 60% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 65% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 70% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 75% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 80% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 85% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 90% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq Approx 95% complete for G160-M44-Index4_TGACCA-_ACB0DPANXX_L004_001.R2.fastq